The present invention relates to peripheral devices in a computer system, and more particularly to accessing peripheral devices in a computer system.
The accessing of peripherals by a microprocessor is well known in the art. Typically, an input/output (I/O) request, i.e., request for writing/reading of data, is sent from the microprocessor to the peripheral via a peripheral bus. In many peripheral bus designs, when a peripheral is addressed by the microprocessor, that peripheral is expected to return an indication onto the peripheral bus that it is ready to accept or supply data. There is a certain period of time during which a hung bus detector will wait for this indication from the peripheral. This is commonly referred to as the xe2x80x9cbus timeout periodxe2x80x9d. If the bus timeout period is exceeded before the indication is received from the peripheral, typically the peripheral is assumed to be too busy or has encountered an error. This is commonly referred to as a xe2x80x9chungxe2x80x9d condition. Conventionally, some part of the hardware of the microprocessor""s device is then reset to free the hung condition. Each time the hardware is reset, a certain amount of device down time is wasted.
Also, with complex computer systems, such as with network communications devices, peripherals connected to the microprocessor via the peripheral bus are often complex xe2x80x9capplication specific integrated circuitsxe2x80x9d, or ASICs, that themselves interface with multiple devices and run complex state machines at the same time. This complexity can increase the variability in response time to I/O requests from the microprocessor, especially if the ASIC must also process highly variable network traffic.
Accordingly, there exists a need for an improved method and system for managing peripheral bus timeouts. The improved method and system should avoid unnecessary resetting of the device hardware. The present invention addresses such a need.
The present invention provides an improved method and system for managing peripheral bus timeouts. The method includes: sending a request to a peripheral in a performance of a task; determining that a peripheral bus timeout occurred; sending an interrupt signal; retrying for an access to the peripheral; completing the request if the retry for the access to the peripheral is successful; and resuming the performance of the task. The present invention provides a software method in which an input/output (I/O) request to a peripheral is sent by a recoverable access routine. When a bus timeout occurs, a hung bus detector asserts an interrupt signal. The peripheral bus is freed from the hung condition. The recoverable access routine is suspended, and a bus timeout interrupt handler is then loaded. The interruption and the freeing of the peripheral bus frees the microprocessor from the processing of the I/O request so that other requests may be performed. During the suspension of the recoverable access routine, a retry routine retries the I/O request. If the retry routine is successful in completing the I/O request, the result of the request is provided to the recoverable access routine, and the recoverable access routine is resumed to complete the task. In this manner, a peripheral bus timeout is managed without the need to reset the device hardware.